ChronoPHY™ Series Multi-rate Copper Ethernet PHY
The ChronoPHY™ family of products feature a multi-gigabit Ethernet PHY with extended reach and ultra-low latency enabled by an innovative, advanced timing architecture for modern networking needs in applications such as wireless access points, broadband access, and data centers.
| Part Number | Speeds | Advanced features | Package |
|---|---|---|---|
| AS21011J | 10Gbps / 5Gbps / 2.5Gbps / 1Gbps / 100 Mbps | IEEE1588v2, Integrated SyncE jitter filter PLL, Any fractional frequency SyncE output clock from 25MHz to 250MHz | 11x11mm BGA |
| AS21010J | 10Gbps / 5Gbps / 2.5Gbps / 1Gbps / 100 Mbps | IEEE1588v2, Integrated SyncE jitter filter PLL, Any fractional frequency SyncE output clock from 25MHz to 250MHz | 7x7mm BGA |
| AS21010P | 10Gbps / 5Gbps / 2.5Gbps / 1Gbps / 100 Mbps | IEEE1588v2 | 7x7mm BGA |
| AS21510P | 5Gbps / 2.5Gbps / 1Gbps / 100 Mbps | IEEE1588v2 | 7x7mm BGA |
| AS21210P | 2.5Gbps / 1Gbps / 100 Mbps | IEEE1588v2 | 7x7mm BGA |
- 10G / 5G / 2.5G / 1G / 100M Base-T single port
- IEEE802.3an/802.3bz/802.3ab/802.3u Compliant
- Energy Efficient Ethernet (EEE)
- Support for IEEE 1588v2 Precision Time Protocol (PTP) with sub-ns time stamping resolution
- Flexible reference clock: 50MHz crystal, 50MHz single-ended CMOS clock, or 156.25 MHz differential clock
- Jumbo Packet Support with Auto-Negotiation and Extended Next Page capability (XNP)
- Auto MDI/MDIX, pair swap/priority/skew correction
- Flexible SERDES interface with support for XFI, SGMII/5000BASE-X/2500Base-X/USXGMII
- Wake-on-LAN Magic packet detection
- 1.8V signaling for MMD access
- Advanced cable diagnostics with on-chip high resolution cable analyzer
- Self-loopback diagnostic capability
- IEEE fast retrain and link monitoring
- Industrial temperature range
- Dual media support with two SERDES options
- 11x11mm and 7x7mm 0.8mm pitch BGA packages